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NTMS4873NF Power MOSFET
Features
30 V, 11.5 A, N-Channel, SO-8
* * * * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Includes SyncFET Schottky Diode Optimized Gate Charge to Minimize Switching Losses SOIC-8 Surface Mount Package Saves Board Space This is a Pb-Free Device
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V(BR)DSS 30 V RDS(ON) MAX 12 mW @ 10 V 15 mW @ 4.5 V ID MAX 11.5 A
Applications
* Synchronous FET for DC-DC Converters * Low Side Notebook Non-VCORE Converters
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJA, t v 10 s (Note 1) Power Dissipation RqJA, t v 10 s(Note 1) Pulsed Drain Current TA = 25C TA = 70C TA = 25C TA = 25C Steady State TA = 70C TA = 25C TA = 25C TA = 70C TA = 25C TA = 25C, tp = 10 ms PD IDM TJ, Tstg IS EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 8.9 7.2 1.39 7.1 5.7 0.87 11.5 9.2 2.31 56 -55 to 150 3.3 60.5 W A C A mJ W A
1
N-Channel Unit V V A W A G S D
MARKING DIAGRAM/ PIN ASSIGNMENT
Source Source Source Gate 1 4873NF AYWWG G 8 Drain Drain Drain Drain
SO-8 CASE 751 STYLE 12
Top View
Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 30 V, VGS = 10 V, IL = 11 Apk, L = 1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
4873NF = Device Code A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
Device NTMS4873NFR2G Package Shipping SO-8 2500/Tape & Reel (Pb-Free)
TL
260
C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Ambient - Steady State (Note 1) Junction-to-Ambient - t v 10 s (Note 1) Junction-to-Foot (Drain) Junction-to-Ambient - Steady State (Note 2) Symbol RqJA RqJA RqJF RqJA Value 89.9 54.2 35.6 143 Unit C/W
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surfacemounted on FR4 board using 1 sq-in pad, 2 oz Cu. 2. Surfacemounted on FR4 board using the minimum recommended pad size.
(c) Semiconductor Components Industries, LLC, 2009
January, 2009 - Rev. 1
1
Publication Order Number: NTMS4873NF/D
NTMS4873NF
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance LS LD LG RG TA = 25C 0.66 0.20 1.5 1.5 3.0 nH nH nH W SWITCHING CHARACTERISTICS (Note 4) td(on) tr td(off) tf VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 10 A TJ = 25C TJ = 125C VGS = 10 V, VDS = 15 V, ID = 1.0 A, RG = 6.0 W 9.8 3.8 22.3 14.3 16 7.0 45 25 V ns ns VGS(TH) VGS(TH)/TJ RDS(on) gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 10 V, VDS = 15 V, ID = 10 A VGS = 4.5 V, VDS = 15 V, ID = 10 A VGS = 0 V, f = 1.0 MHz, VDS = 15 V VGS = 10 V, ID = 10 A VGS = 4.5 V, ID = 8.5 A VDS = 1.5 V, ID = 10 A CHARGES, CAPACITANCES AND GATE RESISTANCE 1275 345 145 10.5 1.3 3.7 3.9 21.4 6.0 6.5 32 nC 1900 525 225 16 nC pF VGS = VDS, ID = 250 mA 1.45 6 9 12 22 12 15 S 2.5 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, VDS = 24 V TJ = 25C VGS = 0 V, ID = 250 mA 30 10 250 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
VDS = 0 V, VGS = 20 V
DRAIN-SOURCE DIODE CHARACTERISTICS VGS = 0 V, IS = 3.5 A 0.55 0.5 20 9.5 10.6 9.0 35 15 20 14 nC 0.7
3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures.
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NTMS4873NF
TYPICAL CHARACTERISTICS
25 20 3.5 V 15 3V 10 5 0 2.8 V 2.6 V 2.4 V 0 0.5 1.0 1.5 2.0 2.5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 10 V 5V 4.5 V 4.2 V 4V 40 VGS = 3.2 V VDS 10 V ID, DRAIN CURRENT (A) 30
ID, DRAIN CURRENT (A)
20 TJ = 125C 10 TJ = 25C TJ = -55C
0
1
1.5
2
2.5
3
3.5
4
4.5
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.045 ID = 10 A 0.035 0.015
Figure 2. Transfer Characteristics
TJ = 25C 0.013 0.011 0.009 0.007 0.005
VGS = 4.5 V
0.025
VGS = 10 V
0.015
0.005
3
4
5
6
7
8
9
10
2.5
7.5
12.5
17.5
22.5
VGS, GATE-TO-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
1.5 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 125 150 0.1 M ID = 11.5 V VGS = 10 V IDSS, LEAKAGE (nA) 10 M 100 M
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V TJ = 125C
TJ = 100C 1M
2.5
7.5
12.5
17.5
22.5
27.5
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NTMS4873NF
TYPICAL CHARACTERISTICS
VGS, GATE-TO-SOURCE VOLTAGE (V) 2000 1750 C, CAPACITANCE (pF) 1500 1250 1000 750 500 250 0 0 5 Coss Crss 10 15 20 25 30 Ciss VGS = 0 V TJ = 25C 10 8 6 4 2 0 VGS VDS, DRAIN-TO-SOURCE VOLTAGE (V) QT
Qgs
Qgd ID = 10 A TJ = 25C
0
4
8
12
16
20
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (A) VDD = 15 V ID = 1 A VGS = 10 V t, TIME (ns) 100 6 5 4 3 2 1 0
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
td(off) tf tr
VGS = 0 V TJ = 25C
10
td(on)
1
1
10 RG, GATE RESISTANCE (W)
100
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ) 100 10 ms -ID, DRAIN CURRENT (A) 10 100 ms 1 ms 1 VGS = 20 V Single Pulse TC = 25C RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 10 ms 60 50 40 30 20 10 0
Figure 10. Diode Forward Voltage vs. Current
ID = 11 A
0.1
dc 100
0.01
25
50
75
100
125
150
-VDS, DRAIN-TO-SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (C)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NTMS4873NF
TYPICAL CHARACTERISTICS
100 50% Duty Cycle
R(t) (C/W)
20% 10 10% 5% 2% 1 1% 0.1 0.01
Single Pulse
0.001 0.0000001 0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response - RqJA at Steady State (1 inch sq pad)
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5
NTMS4873NF
PACKAGE DIMENSIONS
SOIC-8 CASE 751-07 ISSUE AJ
A
8 5
-X-
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NTMS4873NF/D

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